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A CMOS silicon hole spin qubit

Date: Wednesday, May 3, 2017 11:30 - 12:30
Speaker: Romain Maurand (CEA, Grenoble)
Location: Seminar room Big Ground floor / Office Bldg West (I21.EG.101)
Series: Physical Sciences Seminar
Lab building west seminar room

Hole spins in silicon represent a promising direction for solid-state quantum computation, possibly combining fast qubits with limited hyperfine interaction. We report on a qubit device implemented on a foundry-compatible Si CMOS platform. The device, fabricated using silicon-on-insulator NanoWire MOSFET technology, is in essence a two-gate pFET. The qubit is encoded in the spin degree of freedom of a hole quantum dot defined by one of the gates, while the second gate defines another quantum dot used for the qubit initialization and readout. All electrical, two-axis control of the spin qubit is achieved by applying a phase-tunable microwave modulation to one of the gate. We demonstrate fast coherent oscillations with Rabi frequencies as high as 80MHz [2] with an inhomogeneous dephasing time of T2* ~ 300ns. Eventually focusing on the magnetic anisotropy of the qubit response we manage to get some insights on the mechanisms driving the hole spin resonance. By demonstrating a hole spin qubit functionality in a conventional transistor-like layout and process flow, this result bears relevance for the future up-scaling of spin qubit architectures. [1]- Hutin, L. et al. IEEE Symp. VLSI Technol. 1–2 (2016). [2]- Maurand, R. et al. A CMOS silicon spin qubit. Nat. Commun. 7, 13575 (2016).
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